Power Saving Scheme for Process Corner Calibrated Standard Cell Based Flash ADC in Wireless Surveillance Applications
نویسندگان
چکیده
منابع مشابه
Low Power Flash ADC
In this paper, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1GHz, is implemented in a 1.2 V analog supply voltage. HSpice simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes less power i n a commercial 90n...
متن کاملA power-saving data storage scheme for wireless sensor networks
In wireless sensor network (WSN), sensors are small, inexpensive, and computable. However, they are limited in power, memory, and computational capacities. A large number of tiny sensors are usually deployed randomly to monitor one or more phenomena to collect and process the sensed data, and to send the data back to the sink. Many literatures focus on developing power-saving protocols. In addi...
متن کاملHGAF: A Power Saving Scheme for Wireless Sensor Networks
The sensor nodes of wireless sensor networks are placed in observation areas and transmit data to the observer by using multi-hop communication between nodes. Because these nodes are small and have a limited power supply, they must save power in order to prolong the network’s lifetime. We propose HGAF (Hierarchical Geographic Adaptive Fidelity) to give a layered structure to GAF (Geographic Ada...
متن کاملAn Ultra Low-Power ADc for Wireless Micro-sensor Applications
Autonomous micro-sensor nodes rely on low-power circuits to enable energy harvesting as a means of sustaining long-term, maintenance free operation. This work pursues the design of an ultra low-power analog-to-digital converter (ADC) whose sampling rate and resolution can be scaled to dynamically recover power savings. The proposed ADC has a sampling rate of 0-100 kS/s and a resolution of eithe...
متن کاملRuntime Power-Aware Energy-Saving Scheme for Parallel Applications
Energy consumption has become a major design constraint in modern computing systems. With the advent of peta ops architectures, power efficient software stacks have become imperative for scalability. Modern processors provide techniques, such as dynamic voltage and frequency scaling (DVFS), to improve energy efficiency on-the-fly. Without careful application, however, DVFS and throttling may ca...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: SN Computer Science
سال: 2020
ISSN: 2662-995X,2661-8907
DOI: 10.1007/s42979-020-00328-3